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The x86 is an almost-ubiquitous processor family with limited numbers of Registers. Currently only the i386 and floating point instructions are used; possible extensions that Christophe Rhodes are looking at include MMX?, SSE? and 3DNow?.

The x86 port of SBCL is substantially different from most other architectures. In particular, it doesn't partition the registers into descriptor? and non-descriptor? registers, and uses a conservative GC (the GENCGC). It also uses an Alien Stack? instead of the number stack, and Lisp variables for some things such as the next free location for heap allocation where other ports would use a register (alloc-tn? in this case)

The new AMD 64-bit-stuff-stuck-onto-x86 architecture (x86-64, or Hammer) has a bunch of registers. An SBCL port to this chip would probably end up looking a lot more like a non-x86 port than the x86 one does.

Pages in this topic: PENTIUM-STYLE-FYL2XP1   RANDOM-MT19937  

Also linked from: CPU   Garbage Collection   GC   GENCGC   Guard   index   number stack   Performance   SC   Vectorizing  

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