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This page describes (some of) the PowerPC implementation of pseudo-alloc (also know as PA ).

The following bit contains proposed assembly snippets to frob the PA registers. Can somebody who actually knows PPC asm sanity check this for me?

        /* pseudo-atomic register frobs */
	GFUNCDEF(ppc_pseudo_atomic_is_atomic)
        rlwinm REG(3), reg_ALLOC, 30, 0x1
        blr
	SET_SIZE(ppc_pseudo_atomic_is_atomic)

	GFUNCDEF(ppc_pseudo_atomic_set_atomic)
        ori reg_ALLOC, reg_ALLOC, 4
        blr
	SET_SIZE(ppc_pseudo_atomic_set_atomic)

	GFUNCDEF(ppc_pseudo_atomic_clear_atomic)
        andis. reg_ZERO, reg_ALLOC, 0xffff
        andi. reg_ALLOC, reg_ALLOC, 0xfffa
        add reg_ALLOC, reg_ALLOC, reg_ZERO
        blr
	SET_SIZE(ppc_pseudo_atomic_clear_atomic)



        GFUNCDEF(ppc_pseudo_atomic_is_interrupted)
        rlwinm REG(3), reg_NL3, 1, 0x1
        blr
	SET_SIZE(ppc_pseudo_atomic_is_interrupted)

	GFUNCDEF(ppc_pseudo_atomic_set_interrupted)
        oris reg_NL3, reg_NL3, 0x8000
        blr
	SET_SIZE(ppc_pseudo_atomic_set_interrupted)

	GFUNCDEF(ppc_pseudo_atomic_clear_interrupted)
        andi. reg_ZERO, reg_NL3, 0xffff
        andis. reg_NL3, reg_NL3, 0x7fff
        add reg_NL3, reg_NL3, reg_ZERO
        blr     
	SET_SIZE(ppc_pseudo_atomic_clear_interrupted)

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